1. Field of the Invention
The invention relates to a ring oscillator using CMOS technology for the production of a clock signal in an integrated circuit.
2. Discussion of the Related Art
A ring oscillator consists of a loop comprising an odd number of logic gates. To minimize the influence of the supply voltage on the frequency, it is habitual to use only three logic gates 1, 2, 3 as shown in FIG. 1. The invention relates more particularly to a ring oscillator using CMOS technology of the type comprising a threshold amplifier as the logic gate 2 having, at an input, a delay circuit 4 with a resistor R and a capacitor C. The other logic gates 1 and 3 are inverters. These inverter logic gates may also very well fulfill combinational function. For example, the logic gate 1 could be a NOR gate receiving, at an additional input, an on/off control signal for the oscillator.
In an oscillator of the type shown in FIG. 1, the use of a threshold amplifier enables the more efficient control of the oscillation frequency and the reduction of this frequency. The threshold amplifier makes it possible to reduce the influence of the time of propagation in the logic gate. It also makes it possible to immunize the oscillator to noise and reduce the effects of variations in the supply voltage.
Indeed, by sizing the resistor and the capacitor of circuit 4 appropriately so that the time constant RC is far greater than the time of propagation in the logic gates, the oscillation period of the oscillator may be approximated by the following formula: EQU T=2.Req.C.ln[1-(Vb/Vdd)/1-(Vh/Vdd)]
where:
Vdd is the level of the supply voltage, PA1 Vb is the tripping threshold, at a drop in voltage, of the threshold amplifier, PA1 Vh is the tripping threshold, at a rise in voltage, of the threshold amplifier, greater than Vb, and PA1 Req is the equivalent resistance of the delay circuit taking account of the values of input resistance RON of the transistors series-connected with the resistor R.
The present trend is towards reducing the level of the supply voltage Vdd. The integrated circuits and therefore the oscillators must be capable of working in a broadened range of voltage going for example from less than two volts to five or six volts. The oscillation frequency must be stable in this range.
In certain electronic circuits such as load pump devices used to produce high voltages capable of supplying capacitive loads (memories), it is even sought to have a clock oscillation frequency that is higher when the supply voltage diminishes.
Now, at a low supply voltage (of 3 volts or less), the propagation times in the logic gates 1 to 3 are no longer negligible as compared with the time constant RC. Indeed, at low voltage, the transistors are slower to switch over and their input resistance RON increases. As an order of magnitude, it may be said that RON is multiplied by five when Vdd goes from five to two volts. There is then, at low voltage, an equivalent resistance Req in the delay circuit that is higher owing to the increase in the values of resistance of the resistors RON series-connected with the resistor R. The time constant equal to Req.C is increased and therefore the oscillation frequency diminishes.
Thus, the oscillation frequency tends to diminish with the supply voltage and the ring oscillator therefore is not stable in a wide range of voltage.